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Xilinx Virtex-7 FPGA VC709 Connectivity Kit

Xilinx Virtex-7 FPGA VC709 Connectivity Kit

Product model : DK-V7-VC709-G

2019-01-10 Times of browsing: 3600
  • Product introduction
  • characteristic
  • Product specification
  • Physical picture


The Virtex®-7 FPGA VC709 Connectivity Kit is a 40Gb/s platform for high-bandwidth and high-performance applications containing all the necessary hardware, tools and IP to power quickly through your evaluation and development of connectivity systems. This includes a 40Gb/s targeted reference design featuring PCI Express Gen 3, a DMA IP core from Northwest Logic, 10GBase-R, AXI, and a Virtual FIFO memory controller interfacing to an external DDR3 memory. To control and monitor this design, the kit includes a connectivity GUI built on Fedora Live OS which includes all the software drivers. Additionally, this kit contains two fiber optic cables and four transceiver modules leveraged by this design.


  • 40Gb/s Connectivity platform for high-bandwidth and high-performance applications using Virtex-7 VX690T FPGAs

  • Hardware, design tools, IP, and pre-verified reference designs

  • Demonstrates an Featuring 10GBase-R interfacing to external DDR3 memory

  • Advanced memory interface with 2 4GB DDR3 SODIM Memory up to 933MHz / 1866Mbps

  • Enabling serial connectivity with PCIe Gen3x8, 4 SFP+, SMA Pairs, and UART

  • Supports embedded processing with MicroBlaze, soft 32bit RISC

  • Develop networking and other serial applications with 4 SFP/SFP+ ports

  • Expand I/O with the FPGA Mezzanine Card (FMC) interface



Clocking

  • Fixed Oscillator with differential 200MHz output

  • Used as the “system” clock for the FPGA

  • Fixed Oscillator with differential 233.33MHz output

  • Used as the "memory" clock

  • User Programmable (IIC) Differential Oscillator (Range: 10MHz - 810 MHz, 156.250 MHz default)

  • Differential SMA clock input

  • Differential SMA GTH reference clock input

  • Jitter attenuated clock

  • Used to support CPRI/OBSAI applications that perform clock recovery from a user-supplied SFP/SFP+ module

Communication & Networking

  • 4x SFP/SFP+ cages

  • 10x GTH ports to FMC

  • UART To USB Bridge

  • PCI Express 8-lane edge connector

Memory

  • DDR3 SODIMM (qty 2) - each with 4GB up to 933MHz / 1866Mbps

  • BPI Parallel NOR Flash: 32MB (256Mb)

  • IIC EEPROM: 1KB (8Kb)

Configuration

  • Onboard JTAG configuration circuitry to enable configuration over USB

  • BPI Parallel NOR Flash: 32MB (256Mb)

Expansion Connectors

  • FMC-HPC (Partially Populated) connector

  • GTH Transceivers (x10) , 160 single-ended or 80 differential (34 LA & 46 HA) user defined signals

  • VADJ fixed at 1.8 volts

Control & I/O

  • User Push Buttons (x5)

  • User DIP Switch (8-position)

  • User LEDs (x8)

Power

  • AC Power adapter (12V) or ATX


Data download

Contact us

  • +886-2-27918139

    Telephone:+886-2-27918139

  •  Service@e-elements.com.tw

    Mailbox:Service@e-elements.com.tw

  • 5F,NO.61,LANE76,RUIGUANG RD.,NEIHU DIST.,TAIPEI,TAIWAN

    Address:5F,NO.61,LANE76,RUIGUANG RD.,NEIHU DIST.,TAIPEI,TAIWAN

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